Zynq-7000 SoC: FPGA + ARM Embedded System

01 / OVERVIEW

The idea behind it.

End-to-end embedded systems project on the Xilinx Zynq-7000 SoC, which combines a dual-core ARM Cortex-A9 processor (PS) with programmable FPGA fabric (PL). Designed custom digital hardware blocks in SystemVerilog and exposed them to the CPU through AXI4-Lite bus interfaces. Developed a Linux kernel character device driver to map the hardware registers into kernel space and handle interrupt signaling. Finally, wrote a userspace C application that opens the device file, issues ioctl/read/write calls, and demonstrates the hardware acceleration in action — completing the full path from RTL gates to a running application.

02 / FEATURES

What it does.

• 01Custom digital hardware peripheral designed in SystemVerilog
• 02AXI4-Lite slave interface for CPU-to-FPGA communication
• 03Control/status registers mapped over AXI bus
• 04Linux character device driver exposing hardware to userspace
• 05Interrupt handling from PL to PS via GIC
• 06Userspace C application using ioctl, read, and write syscalls
• 07Hardware acceleration offloading compute from the ARM CPU

03 / CHALLENGES

The problems worth solving.

• 01Meeting AXI4-Lite handshake timing and protocol requirements in RTL
• 02Debugging signal integrity and bus transactions in Vivado ILA
• 03Writing a Linux kernel module without crashing the system during development
• 04Correctly mapping physical FPGA register addresses into kernel virtual memory
• 05Synchronizing interrupt handling between PL fabric and the ARM kernel driver
• 06Cross-compiling the driver and application for the ARM target from an x86 host

04 / LEARNINGS

What I took away.

• 01SoC architecture and the PS-PL interface on Zynq-7000
• 02AXI4-Lite protocol — address, data, and handshake phases
• 03SystemVerilog RTL design: modules, interfaces, and finite state machines
• 04FPGA toolchain: synthesis, implementation, and bitstream generation in Vivado
• 05Linux kernel module development: init/exit, cdev, file_operations
• 06Memory-mapped I/O with ioremap and register access from kernel space
• 07Interrupt handling with request_irq and bottom-half processing
• 08Userspace–kernel communication through ioctl and device file read/write
• 09Cross-compilation and deployment workflow for embedded Linux targets